Conference information of FPT
FPT is the premier conference in the Asia-Pacific region on field-programmable technologies including reconfigurable computing devices and systems containing such components. Field-programmable devices promise the flexibility of software with the performance of hardware.
The development and application of field-programmable technology have become important topics of research and development. Field-programmable technology is widely applied, in high-performance computing systems, embedded and low-power control instruments, mobile communications, rapid prototyping and product emulation, among other areas.
Submissions are solicited on new research results and detailed tutorial expositions related to field-programmable technologies, including but not limited to:
- Tools and Design techniques for field-programmable technology including placement, routing, synthesis, verification, debugging, runtime support, technology mapping, partitioning, parallelization, timing optimization, design and run-time environments, high-level synthesis (HLS) compilers, languages and modeling techniques, provably-correct development, intellectual property core-based design, domain-specific development, hardware/software co-design.
- Architectures for field-programmable technology including field-programmable gate arrays, complex programmable logic devices, coarse-grained reconfigurable arrays, field-programmable interconnect, field-programmable analogue arrays, field-programmable arithmetic arrays, memory architectures, interface technologies, low-power techniques, adaptive devices, reconfigurable computing systems, high-performance reconfigurable systems, evolvable hardware and adaptive computing, fault tolerance and avoidance.
- Device technology for field-programmable logic including programmable memories such as non-volatile, dynamic and static memory cells and arrays, interconnect devices, circuits and switches, and emerging VLSI device technologies.
- Applications of field-programmable technology including accelerators for biomedical/scientific/neuro-morphic computing and machine learning, network processors, real-time systems, rapid prototyping, hardware emulation, digital signal processing, interactive multimedia, machine vision, computer graphics, cryptography, robotics, manufacturing systems, embedded applications, evolvable and biologically-inspired hardware.
- Education for field-programmable technology including courses, teaching and training experience, experiment equipment, design and applications.
Note that simply implementing an application using an FPGA is not considered a sufficient research contribution. Application-based papers should emphasize novel design techniques, novel use of embedded resources, or clearly articulated and measured system performance benefits.
The program committee solicits papers describing original research in field-programmable technology, including, but not limited to, the areas of interest indicated above. Papers should be submitted electronically in PDF format, following the IEEE style. Full papers should not exceed 8 pages in length, while posters should not exceed 4 pages in length.
Manuscripts must not identify authors or their affiliations for double-blined review. Papers that identify authors will NOT be considered. Please use online system for submission.
- Paper submission due: July 9, 2018
- Author notification: September 3, 2018
- Final-copy due: October 1, 2018